In the production of a semiconductor wafer such as a silicon wafer, which is a typical example of a work subjected to polishing, in order to obtain a semiconductor wafer having more accurately controlled flatness quality and surface roughness quality, double-side polishing has been performed in which a semiconductor wafer is sandwiched between a pair of polishing plates having polishing pads, thereby simultaneously polishing both front and back surfaces of the wafer. The shape required for a semiconductor wafer (primarily the degree of flatness required for the entire surface and the periphery of the wafer) varies depending on the uses. It is necessary to determine the target amount of polishing removal of a semiconductor wafer depending on the requirements, thereby accurately controlling the amount of polishing removal. In particular, in order to improve the integrity of a large-scale integrated circuit, since the flatness of a semiconductor wafer is one of important factors, techniques for accurately controlling the amount of polishing removal of semiconductor wafers are desired.
Here, JP 2004-363181 A (PTL 1) discloses a polishing method in which the change in the drive current of a motor for driving polishing plates while the polishing on works proceeds such that the thickness of the works equals the thickness of the carrier plates for holding the works (specifically, the inflection point of the value of the current) is detected to terminate polishing. This polishing method is a method for detecting the termination of polishing based on the change in the drive current of the motor, that is, the torque of the polishing plates.
Further, JP 2012-069897 A (PTL 2) discloses a method for polishing a semiconductor wafer, in which the plate load current value of a double-side polishing apparatus for a semiconductor wafer is measured, and the standard deviation of the plate load current value is calculated per reference time, thus estimating the rate of progression of the polishing from the change in the standard deviation. PTL 2 also describes that due to the frictional resistance reduced as the polishing proceeds, the standard deviation of the plate load current value is reduced, and the standard deviation is presumably minimized when the thickness of the wafer and the thickness of the carrier plate come to be equal. This polishing method is a polishing method in which the progress status of polishing is estimated based on the standard deviation of the torque of the polishing plates.